domingo, 31 de enero de 2010

MEMS in CMOS-21st century RF and microwave applications

The availability of MEMS-based passive components and circuitry opens promising new integration options in RF and microwave applications

As semiconductor technology continues to feel the pressure for smaller, tighter and super-integrated components and devices, the RF and microwave industry is reaping the benefits of micro-electrical mechanical systems (MEMS).

Beyond 2 GHz

The semiconductor industry is seeing the emergence of a complementary metal-oxide semiconductor (CMOS) compatible RF MEMS process with attractive performance in the 2 GHz range. This frequency agility has great potential for RF designs in cellular and personal communications systems (PCS), wireless networking, the wireless internet and other platforms that operate up to the mid-2 GHz.

Design teams have optimized Ohmic losses in inductors using large thick copper metal layers and microwave compatible dielectrics. A typical 3 nH spiral inductor has been fabricated featuring a Q factor of 76 at 1.9 GHz. High quality factors ranging from 30 to 80 at 2 GHz have been obtained. Moreover, a full-wave electromagnetic approach, based on the finite element method (FEM) modeling, has shown good accuracy between experimental data and theoretical predictions.

A new design solution

With the continuing miniaturization of electronic systems and advancement of MEMS capabilities, new design solutions continue to emerge. Integration of MEMS devices frequently offers a number of benefits including lower cost, higher performance, reduced size and weight, and increased reliability. In the RF/microwave technology domain, considerable attention continues to be given to the development and integration of MEMS-based components. As shown in a representative block diagram for a RF Telecom system (Figure 1), MEMS device technology is already being applied to selective (passive/active) components including inductors, capacitors, switches, and filters. These devices, when integrated with the RF chip, offer higher value for such applications as VCOs, PLL, and other RF functionality required for advanced telecom systems. The industry is just beginning to see the benefits of such integrated devices, including increased device performance and/or a reduction in cost, size, or weight of the system.

The technology

The technology discussed in this article, for fabrication of RF MEMS components, is a low temperature processing capability, fully compatible with CMOS IC fabrication.

One of the directions that the rapid advancements in both substrate development and integration have been focused on is improving the RF performance of silicon technology. This is due, in part, to its low cost and its dielectric and micromachining properties. The high-Q inductor offers an excellent example of the cost reduction, high integration density and performance improvements benefits of RF MEMS and microwave devices.

Typically, the quality factor of inductors using silicon technology is less than 10 at 2 GHz. Therefore, to achieve high-performance RF-integrated circuits, most applications still require off-chip inductors. Drawbacks of off-chip inductors include significant parasitic effects, prohibitive size and increased packaging complexity. However, recent efforts have yielded high-quality factor inductors using silicon device technology, low permitivity material, and thick copper metallization.

Inductor designs are currently under way in circuit applications at a number of well-known telecommunications equipment and telecom semiconductor manufacturers. Design teams have begun work on other integrated passive components as well. It should also be mentioned that the same integrated (on-chip) components may also be fabricated for discrete (off-chip) applications where performance improvements alone are required, but in the original packaging specification.

Topology of the system

When applied to inductor design, the CMOS-compatible process technology mentioned above minimizes parasitic effects of the substrate and provides high-integration density. The new process enables definition of a completely new inductor that can be deployed on RF circuits using flip-chip techniques or a new "above-IC" process.

This process consists of electroplating copper over a low permitivity material layer which is placed on the integrated circuit. The inductor is further interconnected to the IC by vias through the insulator layer. The above-IC technique is attractive because of its small size, package cost reduction, superior interconnect performance, applicability for mixed technologies and overall cost reduction for high volume applications.

The innovative aspect of the process is the thick metal realization on a low permitivity material. The electroplated copper conductors are implemented within a photoresist mold using conventional UV equipment. This technique provides high aspect ratios with angles near 90 degrees.

The spiral inductors and the different technological layers are presented in Figure 2. The photograph shows the intrinsic part of the inductor and the two co-planar ports (the latter necessary only for probe testing). Two kinds of inductors have been processed, one using silicon substrates and one using quartz. Different inductor values have been designed in the 2 GHz range. Typical values ranging from 1.5 nH to 18 nH have been obtained for geometrical parameters compatible with RF integrated circuits (table 1).

Modeling of the inductors

First, the different electrical (Ls, Rs) and geometrical (length, width, gap) parameters of the inductors have been obtained using classical method. Then, an original approach has been used to model the inductors. To obtain Q factor and a more accurate value of the inductance, an approach using a full-wave electromagnetic simulation based on FEM, allows excellent agreement between measurement and theoretical predictions. The nominal meshing of an inductor is described in Figure 3. The FEM model allows us to create a parameterized description of the inductor that can be used to define high performance inductors. Moreover, this technique allows us to model the complete structure including the different layers and properties of the materials.

Characterization of the inductors

The characterization is achieved on a wafer with scattering parameters measured from 100 MHz to 16 GHz using an HP 8510 network analyzer and a cascade probe station. Two kinds of characterizations have been implemented. A classical one that uses thru-reflect-line (TRL) calibration in the probe planes, and a de-embedding response, which allows determination of the intrinsic parameters of the inductor. Figure 4 shows the results obtained up to 16 GHz for a 3 nH inductor using a silicon substrate and a thru-reflect- line (TRL) calibration procedure. In Table 1, the main results are summarized on the inductors using one or two metal layers on the silicon substrate.


With the continuing miniaturization of electronic systems and the advancement of MEMS capabilities, design solutions continue to emerge with the integration of MEMS technology. Specific to RF and telecomm applications, potential integration opportunities exist for inductors, capacitors, switches, filters and other integrated RF functions. An example of this was presented with the high-Q inductor designs. The architecture of these inductors allows integration of any radio frequency (RF) and monolithic microwave integrated circuits (MMIC). Moreover, the electromagnetic simulation techniques, along with our new technology, enabled us to get high-quality passives for silicon RF chips using thick copper metallization, low permitivity dielectric material and new above-IC process. All of these improvements lead to high-quality factor inductors in the 2 GHz range. High Q ranging from 30 to 80 with the mean value equal to 50 have been obtained for inductor values ranging from 1.5 nH to 18 nH. Such high-quality factors for inductors are among the best results in silicon, particularly when using standard technology.


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